Analog Content-Addressable Memory Cells for Ultrafast Parallel Searching

A method to fabricate a parallel search architecture in the analog domain to improve inference accuracy, memory architecture, and speed.

Problem:

The ability to process large volumes of data is critical as artificial intelligence and big data applications expand. Compute-in-memory (CIM) approaches look to achieve temporal and energetic efficiency in data movement by combining memory and processing in the same cell to allow for the continued development of traditional computing architectures. Current CIM efforts require conversion from digital to analog or vice-versa for computational operation, hindering both power and speed. Analog content-addressable memory (ACAM) cells have been proposed but are power- and assembly-intensive.

Solution:

A non-volatile, compact method to fabricate ACAM cells. The fabricated ACAM cell allows for parallel search to be conducted directly where data resides, mitigating the power data transport costs of searching between separate computing and memory units. Computation and conversion are merged in the cell to allow higher memory densities and reduced power usage.

Technology:

ACAM architectures are fabricated based on two ferroelectric field-effect transistors (FeFETs) to allow performs parallel searches in the analog domain with over 40 distinct match windows. The ACAM cell leverages the flexible threshold voltages of the two-ferroelectric field-effect devices to store over 40 unique windows within each cell and examine an analog input against this stored range to identify a match or a mismatch for the parallel search. The cell notably does not require additional transistors beyond the two FeFETs, nor an external analog converter circuit.

Advantages:

  • Outperforms current state-of-the-art by yielding improved inference accuracy by 5%, 3x denser memory architecture, and more than 100x faster speed compared to central processing unit (CPU) and graphics processing unit (GPU) per similarity search
  • Provides a fabrication route to manufacture ACAM cells capable of experimental demonstration using any complementary FeFET technology.




Schematic diagram of CAM architectures. The digital CAM (left) architecture focuses comparing digital query and keys for identifying exact matches or mismatches. The analog CAM architecture (right) in which analog query is compared with analog intervals, aims to identify whether it falls within (match) or outside of these intervals (mismatch).

Stage of Development:

  • Proof of Concept
  • Bench Prototype

Intellectual Property:

Reference Media:

Desired Partnerships:

  • License
Patent Information:

Contact

Ryan Luebke

Associate Director, Technology Licensing
University of Pennsylvania
215-898-7573

RESEARCHERS

Keywords

Docket: 24-10501