FeFET Memory Device for BEOL Silicon Integration

A ferroelectric transistor memory device combines AlScN dielectric with a 2D semiconductor channel such as MoS2 for non-volatile memory compatible with CMOS back-end of line (BEOL) fabrication.

Problem:

FeFET memories need reliable ferroelectric films and fabrication compatible with CMOS back-end processing. Existing approaches can face scaling and durability challenges. Semiconductor memory devices also need persistent switching and compact structures for embedded use. A lower-temperature FeFET architecture is needed for silicon microchip integration.

Solution:

The technology uses aluminum scandium nitride as a ferroelectric dielectric and a 2D semiconductor as the transistor channel. This structure forms a FeFET memory device with source, drain, and back-gate electrodes. The technology also provides voltage-driven switching between persistent states. Fabrication can be performed below about 400 degrees Celsius for BEOL compatibility.

Technology:

The device includes an AlScN portion in electronic communication with a semiconducting channel portion comprising a 2D material. A back-gate electrode interfaces with the AlScN portion, and source and drain electrodes interface with the channel. Disclosed examples include MoS2 and WSe2 channel materials. Methods also include fabricating the component and applying voltage to switch persistent states.

Advantages:

  • Combines a ferroelectric AlScN dielectric with a 2D semiconductor channel in a transistor memory structure.
  • Supports persistent state switching through applied voltage.
  • Uses a structure compatible with CMOS back-end-of-line processing.
  • Supports fabrication below about 400 degrees Celsius.
  • Provides a simple FeFET gate stack architecture for non-volatile memory.

Applications:

  • Non-volatile memory: The technology can be used in FeFET-based non-volatile memory devices.
  • Embedded memory: The technology can be used for embedded memory on silicon logic.
  • Memory-based computing: The technology can support memory-based computing architectures.
  • CMOS-integrated memory: The technology can be fabricated for back-end integration on silicon microchips.



 

Stage of Development:

  • Prototype

Intellectual Property:

Reference Media:

Partnerships:

  • Licensing
Patent Information:

Contact

Ryan Luebke

Associate Director, Technology Licensing
University of Pennsylvania
215-898-7573

RESEARCHERS

Keywords

Docket #20-9330